SexOS ยท Core Design
Architecture
๐ Kernel Core
Sex is a microkernel, meaning it implements only the most fundamental primitives required to build a complete operating system. The goal is to keep the privileged code within a Tiny Trusted Computing Base (TCB) of roughly 5โ8 kLOC.
๐ Design Principles
- Global Single Virtual Address Space (SAS): Every thread, process, and server shares the same 64-bit virtual address space.
- Hardware-Enforced Protection: Isolation is achieved through hardware features like Intel PKU/MPK and CHERI (where available), rather than page table switching.
- Zero-Copy IPC: High-performance messaging through shared memory regions and Protected Procedure Calls (PDX).
- Capability-Based Security: All system resources (memory, IPC ports, interrupts) are managed via unforgeable capabilities.
- Asynchronous I/O (Zero Mediation): Hardware signals are pushed into lockless ring buffers, eliminating context switch jitter.
๐ Memory & Protection Domains
๐ Global Single Virtual Address Space (SAS)
In Sex, all data is mapped into a single 64-bit address space. This removes the need for page table switching (and the resulting TLB flushes) when moving between protection domains. Addresses are globally unique across the entire system.
๐ก Protection Domains (PDs)
Isolation is enforced by Protection Domains (PDs). Each domain represents a logical set of permissions (Read, Write, Execute) over specific address ranges.
- Intel PKU / MPK: Sex uses Intel Memory Protection Keys (PKU) to assign a 4-bit "key" to each page. A hardware register (PKRU) defines the current thread's access rights for each of the 16 available keys.
- Atomic PKRU Management: Domain masks are managed via atomic operations to ensure thread-safe switches in multicore environments.
| PKEY | Purpose |
|---|---|
PKEY 0 | Kernel + default (no restriction) |
PKEY 1 | sexdisplay / framebuffer (trusted display domain) |
PKEY 2+ | Future userland PDs |
โก IPC Primitives: PDX & Ring Buffers
๐ Protected Procedure Calls (PDX)
The core IPC mechanism is a synchronous Protected Procedure Call (PDX).
- Safe PDX: Validates a capability before performing a hardware-accelerated domain switch.
- Fused PDX: Bypasses capability checks for high-frequency hot-paths between "fused" domains.
๐ฆ Asynchronous Ring Buffers
For interrupts and high-volume data transfer, Sex uses lockless, SPSC (Single Producer, Single Consumer) ring buffers. These are cache-line aligned to prevent false sharing on 128-core systems.
๐ Capability System
Sex uses a Sparse Capability system. A capability is an unforgeable token that proves its holder has the right to access a specific resource.
๐ Capability Types
- Memory Capabilities: Define access (R/W/X) to a range of virtual memory via "Memory Lending".
- IPC Capabilities: Grant permission to call or listen on a specific PDX port.
- Interrupt Capabilities: Allow a user-space sexdrive to respond to hardware interrupts via ring buffers.
- Domain Capabilities: Allow management and configuration of Protection Domains.
๐ฅ User-space Servers
All traditional OS services run in isolated user-space Protection Domains.
| Server | Responsibility |
|---|---|
| sext | Manages the global VAS and handles asynchronous page faults via large pages. |
| Capability Server | Central authority for capability policy, distributed for local core scaling. |
| sexfiles | Unified file system interface (Phase 3). |
| sexnet | User-space TCP/IP stack (Phase 3). |
| sexinput | Isolated hardware management (Mouse, Keyboard, etc.). |
๐บ Architecture Roadmap
| Phase | Status | Description |
|---|---|---|
| 0: Bootstrap | Complete โ | Bootable kernel skeleton, basic HAL, VGA/serial console, UEFI. |
| 1: Core Primitives | Stable ๐ | Physical memory manager, sexting, Protection Domains, PDX, SMP boot. |
| 2: Capabilities & Servers | Stable ๐ | Capability engine, user-space sext, SMP 128-core, interrupt management. |
| 3: Services & sexfiles | Stable ๐ | Standalone sexfiles, real block I/O, ramfs, POSIX syscall bridge. |
| 4: Distribution | Complete โ | Standalone sexnet, remote PDX routing, zero-copy packet transfer. |
| 5: Hardware & sexdrive | Complete โ | ARM64 design, DDE-Sex shim, NVIDIA 3070 GPU, sexdrive server. |
| 6: Signal Trampoline | Complete โ | Background trampoline threads, POSIX sigaction ABI, lock-free signals. |
| 7: Memory Subsystem | Complete โ | Lock-free buddy allocator, PKU domain management, async #PF forwarding. |
| 8: ELF Loader + PD Spawn | Complete โ | ELF segment parsing, PD creation, sys_spawn_pd. |
| 9: Driver Enablement | Complete โ | NVMe/AHCI driver, zero-copy DMA, MSI-X, input stack. |
| 10: Graphical Plumbing | Complete โ | sexdisplay server, HID routing, zero-copy graphics, Mesa bootstrap. |
| 11: GNU Pipeline | Complete โ | POSIX pipes, fork/exec, coreutils, signal delivery, Lin-Sex compatibility. |
| 12: Dynamic Translators | Complete โ | sexnode translator, on-the-fly ELFโSex binary translation. |
| 13: Self-Hosting | Complete โ | sex-gemini agent, sexstore packages, full in-Sex build loop. |
| 14: Formal Verification | Complete โ | Refined allocator, hardened PKU init, CHERI prep, verification hooks. |
| 15: Linux Driver Translation | Complete โ | DDE-style wrappers, on-the-fly Linux driver translation, hot-plug. |
| 16: Userspace Maturity | Complete โ | Operational sexnode, GitHub fetch, Linux benchmarks, FLSCHED verification. |
| 19: sexfiles Overhaul | Complete โ | 100% lock-free VFS, zero-copy PKU handover, lock-free LRU cache. |
| 20: Graphical Sex-Store | In Progress ๐๏ธ | One-click sexting, binary caching, app store GUI. |
The Sex Microkernel project has successfully evolved from a single-core bootloader into a high-performance, distributed Single Address Space Operating System. By leveraging Intel PKU for zero-cost isolation and a global 64-bit VAS, we have created a platform that treats a sexnode of machines as one unified, secure, and lightning-fast computer.